MIPS

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Microprocessor without Interlocked Pipeline Stages (MIPS)

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The MIPS processor is of type RISC (Reduced Instruction Set Computer)

Registers

General Purpose Registers

Number	Symbol Name `$`	Description
0	`$zero`	Constant 0, wired to 0V
1	`$at`	Reserved for assembler
2 - 3	`$v0` - `$v1`	Return (v)alues from function calls
4 - 7	`$a0` - `$a3`	(A)rguments for the function calls
8 - 15	`$t0` - `$t7`	(T)emporal registers, for half-way calcs
16 -23	`$s0` - `$s7`	(S)aved registers, (scope)
24 - 25	`$t8` - `$t9`	(T)emporal registers 2
26 - 27	`$k0` - `$k1`	(K)ernel registers
28	`$gp`	(G)lobal (P)ointer
29	`$sp`	(S)tack (P)ointer
30	`$fp`	(F)rame (P)ointer
31	`$ra`	(R)eturn (A)ddress

Specific Purpose Registers

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This registers are not writable by the programmer and neither have a symbol to access them, instead the value is accessed by the instructions mflo and mfhi

Symbol Name `$`	Description
`HI`	In products, store the 32 most significat bits. In divisions, the least ones
`LO`	In divisions, store the 32 most significat bits. In products, the least ones
`PC`	Program Counter, stores the address of the next instruction to be executed

Float registers

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The decimal point values in MIPS are handled over another set of register for this specific purpose

Number	Symbol Name `$`	Description
0-31	`$f0` - `$f31`	Float values

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The Double types use a pair of this registers, the convention is to the a pair starting from the even register: E.G. $f4 & $f5

Assembly

Instructions

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Instructions basic structure

The instructions follow the syntax: <mnemo> <param1> <param2> [<param3>]

Instructions list

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MIPS Instructions Format

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Addressing modes

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The default numeric format for arithmetic operations is signed in 2’s complement

Use the sufix u for unsigned operations: E.G. addu

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Address accessing must be aligned based on the instruction

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Most of the instructions have multiple versions that do similar things, thoose versions are usually denoted by some sufix

Sufix list

-u → Unsigned, Operands will be treated as unsigned values

-i → Inmediate, This sufix is used for the variation of a instruction where the last argument is an inmediate, not a register

-.d → Decimal Point, Perform the instruction using float parameters

c1 → Coprocesor1, Use registers from coprocesor1 (floats)

Instructions variations will be defined in the same page as the original instruction

Sections

Assembly code is divided in sections, this sections can be defined in any order and each one have its own purpose (only the .text and .data section are required)